The present invention relates to a method of operating an embedded system and to an embedded system, also to a method and apparatus for data communication between a host computer and a target computer system and more particularly but not exclusively between a host computer and an embedded target computer system.
During development and testing of an embedded computer system, especially an embedded microprocessor-based computer system, it is normally necessary to connect the system to a host computer so that an engineer can debug the embedded system. Debugging software on the host computer provides access by the engineer into the embedded system. Typically, the engineer uses the host computer and debugging software to set break points which stop threads of execution on the target embedded system, monitor registers in the target, monitor memory states and monitor input and output data. The engineer may also restart threads that have been previously stopped and perform a variety of other tasks including rebooting the target computer using the host.
Although in normal operation the embedded system may be virtually self-sufficient in that it does not in normal use need to perform input/output, it may be necessary during debugging for such input/output to be performed. Examples of this are displaying messages at the host, reading characters from the host keyboard or reading data from a file stored on the host. Similar situations requiring input/output may occur where an embedded system is sold to an end user and the end user needs to customize the embedded system, for example writing information into programmable read only memory in the embedded system.
Embedded systems may contain more than one application, for instance stored in a read only memory or downloaded over a link, at run-time. An example of the latter is a satellite transmission link. Each such application may need to perform input output of data to the host computer during debugging. Furthermore, applications may be interconnected so that one application that is executing may, at a virtually arbitrary point in time, cause another application to start executing. Although it is possible to provide input/output libraries during the construction of each application, such libraries, and as a result the protocol implemented by the application for input/output, may differ between applications.
One problem when debugging a system is that of conveying to an application the fact that the host system is connected, and is in control. Absent this information, the application may be able to act in a way that results in it taking over control of the system, or which results in overwriting of data needed by the host.
As used herein, the term xe2x80x98digital signal processorxe2x80x99 includes microprocessors in general and other like digitally operating processing devices.
It is accordingly a primary object of the present invention to at least partially overcome the difficulties of the prior art.
According to a first aspect of the present invention there is provided a method of operating a target system having a digital signal processor said digital signal processor having plural registers, the target system further having a link connectable to a host computer for debugging said target system, wherein said target system further has a memory having plural addressable locations, one of said locations being designated for storage therein of pointer information indicative of the entry point of a subroutine useable in debugging by said host computer, and other locations storing an application program, the method comprising:
setting the contents of a predetermined one of said registers of said digital signal processor to a first value when said host is connected to said link, and to a second value when said host is not connected to said link;
starting execution by said digital signal processor of said application program on said target system, wherein said step of starting execution comprises:
reading the content of said predetermined one of said registers;
when said one register stores said second value, writing a predetermined value to said one of said locations;
when said one register stores said first value, leaving the contents of said one of said locations unchanged.
According to a second aspect of the present invention there is provided a computer system having a digital signal processor, said digital signal processor having plural registers, the system further having a link connectable to a host computer for debugging said system, wherein said system further has a memory having plural addressable locations, one of said locations being designated for storage therein of pointer information indicative of the entry point of a subroutine useable in debugging by said host computer, and other locations storing an application program, the system comprising:
reset circuitry for setting the contents of a predetermined one of said registers of said digital signal processor to a second value;
circuitry responsive to a host connected to said link for setting the contents of said register to a first value;
said digital signal processor comprising circuitry starting execution of said application, and further comprising determining circuitry for determining the content of said predetermined one of said registers; and writing circuitry for writing a predetermined value to said one of said locations when said one register stores said second value, whereby when said one register stores the first value, the contents of said one of said locations remains unchanged.